1. Field of Invention
The present invention relates to a method for a pre-amorphization. More particularly, the present invention relates to a method for creating an amorphous layer over the gate and the source/drain regions of a MOS transistor before performing a self-aligned titanium silicide process (Salicide process).
2. Description of Related Art
As the dimensions of polysilicon gate continue to shrink, narrow line effect becomes a major factor in producing high-quality, self-aligned titanium silicide layers. The so-called narrow line effect refers to problems due to a reduction in gate dimensions. With a small gate dimensions, too much stress may accumulate at the interface between the polysilicon gate and the metal silicide layer. In addition, there may be too few nucleation sites on the original surface for forming a high quality metal silicide layer, thereby leading to an increase in sheet resistant that may frequently affect the operation of the transistor gate.
Therefore, in the fabrication of semiconductor devices having a line width smaller than 0.25 .mu.m, a pre-amorphization implant (PAI) is normally carried out first. The PAI creates a layer of amorphous silicon over the polysilicon gate and the source/drain regions of a transistor so that a subsequent self-aligned silicide process can produce a metal silicide layer having a lower sheet resistant.
The most common pre-amorphization method includes bombarding the surface of a polysilicon layer with arsenic (As.sup.+) ions. The arsenic ions damage the internal crystal structure of the polysilicon layer so that a layer of amorphous silicon is formed. However, after a PAI treatment with arsenic ions, some of the ions may pass through the grain boundaries of the polysilicon crystal and finally end up at the interface between the polysilicon gate or the gate oxide layer itself. In some cases, the arsenic ions may even penetrate into the substrate leading to an increase in subthreshold current of an NMOS and the amplification of the kink effect.
In addition, if the transistor is a PMOS, P-type dopants are embedded inside its source/drain regions. Therefore, whenever a pre-amorphization treatment is performed with N-type arsenic ions, some of the N-type arsenic ions implanted into the source/drain regions may neutralize the effect produced by the original P-type dopants. Consequently, conductivity at the source/drain regions of a PMOS may worsen and the current (Id) flowing from the source/drain terminal may drop.
In light of the foregoing, there is a need to provide a better pre-amorphization method.